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LTC1458/LTC1458L Quad 12-Bit Rail-to-Rail Micropower DACs
FEATURES
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DESCRIPTION
The LTC(R)1458/LTC1458L are complete single supply, quad rail-to-rail voltage output, 12-bit digital-to-analog converters (DACs) in SO-28 and SSOP-28 packages. They include an output buffer amplifier with variable gain (x1 or x2) and an easy-to-use 3-wire cascadable serial interface. The LTC1458 has an onboard reference of 2.048V and a full-scale output of 4.095V in a x 2 gain configuration. It operates from a single 4.5V to 5.5V supply dissipating only 5.5mW (ICC = 1.1mA typ). The LTC1458L has an onboard 1.22V reference and a fullscale output of 2.5V in a x2 gain configuration. It operates from a single supply of 2.7V to 5.5V dissipating 2.4mW. Excellent DNL, low supply current and a wide range of built-in functions allow these parts to be used in a host of applications when flexibility, power and single supply operation are important.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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12-Bit Resolution Buffered True Rail-to-Rail Voltage Output 5V Operation, ICC: 1.1mA Typ (LTC1458) 3V Operation, ICC: 800A Typ (LTC1458L) Built-In Reference: 2.048V (LTC1458) 1.220V (LTC1458L) CLR Pin Power-On Reset SSOP-28 Package 3-Wire Cascadable Serial Interface Maximum DNL Error: 0.5LSB Low Cost
APPLICATIONS
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Digital Calibration Industrial Process Control Automatic Test Equipment Low Power Systems
TYPICAL APPLICATION
Daisy-Chained Control Outputs Functional Block Diagram: Quad 12-Bit Rail-to-Rail DAC
2.048V (LTC1458) 1.22V (LTC1458L) REFOUT REFHI C FROM P 5V (LTC1458) 3V TO 5V (LTC1458L) DIN VCC REFHI B
0.5 0.4 0.3 0.2
CS/LD CLK
DAC C 48-BIT SHIFT REGISTER AND DAC REGISTER
DAC B
DNL (LSB)
VOUT C X1/X2 C REFLO C REFHI D VOUT D X1/X2 D REFLO D
VOUT B X1/X2 B REFLO B REFHI A
DAC D
DAC A
VOUT A X1/X2 A REFLO A
CLR
DOUT
1458 BD01
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Differential Nonlinearity vs Input Code
0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0 512 1024 1536 2048 2560 3072 3584 4095 CODE
1458 G09
1
LTC1458/LTC1458L ABSOLUTE MAXIMUM RATINGS
VCC to GND .............................................. - 0.5V to 7.5V Logic Inputs to GND ................................ - 0.5V to 7.5V VOUT A , VOUT B, VOUT C, VOUT D, X1/X2 A , X1/X2 B, X1/X2 C, X1/X2 D ......................................... - 0.5V to VCC + 0.5V REFHI A , REFHI B, REFHI C, REFHI D, REFLO A , REFLO B, REFLO C, REFLO D ........................................ - 0.5V to VCC + 0.5V Maximum Junction Temperature ......................... 125C Operating Temperature Range LTC1458C/LTC1458LC .......................... 0C to 70C LTC1458I/LTC1458LI ...................... - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
PACKAGE/ORDER I FOR ATIO
TOP VIEW X1/X2 C VOUT C CS/LD DIN REFHI C GND REFLO C REFLO D REFHI D 1 2 3 4 5 6 7 8 9 28 VCC 27 X1/X2 B 26 VOUT B 25 CLR 24 REFHI B 23 GND 22 REFLO B 21 REFLO A 20 REFHI A 19 REFOUT 18 NC 17 VOUT A 16 X1/X2 A 15 VCC SW PACKAGE 28-LEAD PLASTIC SO WIDE
ORDER PART NUMBER LTC1458CG LTC1458CSW LTC1458LCG LTC1458LCSW
DOUT 10 CLK 11 NC 12 VOUT D 13 X1/X2 D 14 G PACKAGE 28-LEAD PLASTIC SSOP
TJMAX = 125C, JA = 100C/W (G) TJMAX = 125C, JA = 150C/W (SW)
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
VCC = 4.5V to 5.5V (LTC1458), 2.7V to 5.5V (LTC1458L), X1/X2 = REFLO = GND, REFHI = REFOUT, VOUT unloaded, TA = TMIN to TMAX, unless otherwise noted.
SYMBOL DAC Resolution DNL INL VOS VOSTC VFS Differential Nonlinearity Integral Nonlinearity Offset Error Offset Error Temperature Coefficient Full-Scale Voltage When Using Internal Reference, LTC1458, TA = 25C LTC1458 When Using Internal Reference, LTC1458L, TA = 25C LTC1458L VFSTC Reference Reference Output Voltage Reference Output Temperature Coefficient Reference Line Regulation Reference Load Regulation Reference Input Range Reference Input Resistance 0 IOUT 100A, LTC1458 LTC1458L VREFHI VCC - 1.5V
q q q q q q q
PARAMETER
CONDITIONS
MIN 12
TYP
MAX
UNITS Bits
Guaranteed Monotonic (Note 1) TA = 25C (Note 1) TA = 25C
q q q
0.5 1.75 2.25 3.0 6.0 15 4.065 4.045 2.470 2.460 4.095 4.095 2.500 2.500 24 4.125 4.145 2.530 2.540 4.0 4.5 12 18
V/C V V V V ppm/C
Full-Scale Voltage Temperature Coefficient
When Using Internal Reference
LTC1458 LTC1458L
q q
2.008 1.195
2.048 1.220 20 0.7 0.2 0.6 VCC /2
2.088 1.245
ppm/C 2.0 1.5 3.0 40 LSB/V LSB LSB V k
15
24
2
U
LSB LSB LSB mV mV V V
W
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WW
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LTC1458/LTC1458L
ELECTRICAL CHARACTERISTICS
VCC = 4.5V to 5.5V (LTC1458), 2.7V to 5.5V (LTC1458L), X1/X2 = REFLO = GND, REFHI = REFOUT, VOUT unloaded, TA = TMIN to TMAX, unless otherwise noted.
SYMBOL PARAMETER Reference Input Capacitance Short-Circuit Current Power Supply VCC ICC Positive Supply Voltage Supply Current For Specified Performance, LTC1458 LTC1458L 4.5V VCC 5.5V (Note 4) , LTC1458 2.7V VCC 5.5V (Note 4), LTC1458L VOUT Shorted to GND VOUT Shorted to VCC Input Code = 0 (Note 2) (Notes 2, 3) to 0.5LSB REFHI = 1kHz, 2VP-P, (Code: All 0s) REFHI = 1kHz, 2VP-P, (Code: All 1s)
q q q q
CONDITIONS REFOUT Shorted to GND
q
MIN
TYP 15 45
MAX 120 5.5 5.5
UNITS pF mA V V A A mA mA V/s s nV * s dB dB
4.5 2.7 1100 800 60 70 40 0.5 1.0 14 0.3 - 95 85
2400 2000 120 120 120
Op Amp DC Performance Short-Circuit Current Low Short-Circuit Current High Output Impedance to GND AC Performance Voltage Output Slew Rate Voltage Output Settling Time Digital Feedthrough AC Feedthrough SINAD Signal-to-Noise + Distortion
q q q q
VCC = 5V (LTC1458), 3V (LTC1458L), TA = TMIN to TMAX
SYMBOL Digital I/O VIH VIL VOH VOL ILEAK CIN Switching t1 t2 t3 t4 t5 t6 t7 t8 t9 DIN Valid to CLK Setup DIN Valid to CLK Hold CLK High Time CLK Low Time CS/LD Pulse Width LSB CLK to CS/LD CS/LD Low to CLK DOUT Output Delay CLK Low to CS/LD Low CLOAD = 15pF
q q q q q q q q q
PARAMETER Digital Input High Voltage Digital Input Low Voltage Digital Output High Voltage Digital Output Low Voltage Digital Input Leakage Digital Input Capacitance
CONDITIONS
q q
MIN 2.4
LTC1458 TYP
MAX
MIN 2.0
LTC1458L TYP MAX
UNITS V
0.8 VCC - 1.0 0.4 10 10 VCC - 0.7
0.6 0.4 10 10
V V V A pF
IOUT = - 1mA IOUT = 1mA VIN = GND to VCC Guaranteed by Design, Not Subject to Test
q q q q
40 0 40 40 50 40 20 150 20
60 0 60 60 80 60 30 220 30
ns ns ns ns ns ns ns ns ns
3
LTC1458/LTC1458L
ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the full operating temperature range. Note 1: Nonlinearity is defined from the first code that is greater than or equal to the maximum offset specification to code 4095 (full scale). Note 2: Load is 5k in parallel with 100pF. Note 3: DAC switched between all 1s and the code corresponding to VOS for the part. Note 4: Digital inputs at 0V or VCC.
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1458 Differential Nonlinearity (DNL)
0.5 0.4 0.3
INL ERROR (LSB)
0.2
DNL (LSB)
0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0 512 1024 1536 2048 2560 3072 3584 4095 CODE
1458 G09
0.4 0 -0.4 -0.8 -1.2 -1.6 -2.0 0 512 1024 1536 2048 2560 3072 3584 4095 CODE
1458 G08
VCC - VOUT (V)
Minimum Output Voltage vs Output Sink Current
1000
OUTPUT PULL-DOWN VOLTAGE (mV)
900 800 700 600 500 400 300 200 100 0.1 0
REFLO = GND X1/X2 = GND 25C
OUTPUT SWING (V)
125C -55C
3.0 2.5 2.0 1.5 1.0 0.5
RL
OUTPUT SWING (V)
5
10 15 20 25 OUTPUT SINK CURRENT (mA)
4
UW
30
1458 G04
LTC1458 Integral Nonlinearity (INL)
2.0 1.6 1.2 0.8 1.0 0.8 0.6 0.4 0.2 0 1.4 1.2
Minimum Supply Headroom for Full Output Swing vs Load Current
VOUT < 1LSB REFLO = GND X1/X2 = GND CODE: ALL 1's VOUT = 4.095V
0
5
10 15 20 LOAD CURRENT (mA)
25
30
1458 G03
Output Swing vs Load Resistance
4.5 4.0 3.5 REFLO = GND X1/X2 = GND 4.5 4.0 3.5 3.0
Output Swing vs Load Resistance
REFLO = GND X1/X2 = GND
VCC
2.5 2.0 1.5 1.0 0.5 0
RL
0 10 100 1k LOAD RESISTANCE () 10k
1458 G05A
10
100 1k LOAD RESISTANCE ()
10k
1458 G06A
LTC1458/LTC1458L TYPICAL PERFORMANCE CHARACTERISTICS
LTC1458 Full-Scale Voltage vs Temperature
4.110 4.105 5 4
SFULL-SCALE VOLTAGE (V)
SUPPLY CURRENT (A)
OFFSET VOLTAGE (mV)
4.100 4.095 4.090 4.085 4.080 -55
-25
5 35 65 TEMPERATURE (C)
PIN FUNCTIONS
X1/X2 C, X1/X2 D,X1/X2 A, X1/X2 B (Pins 1, 14, 16, 27): The Input Pin that Sets the Gain for DAC C/D/A/B. When grounded the gain will be 2, i.e., output full-scale will be 2 * REFHI. When connected to VOUT the gain will be 1, i.e., output full-scale will be equal to REFHI. VOUT C, VOUT D, VOUT A, VOUT B (Pins 2, 13, 17, 26): The Buffered DAC Outputs. CS/LD (Pin 3): The Serial Interface Enable and Load Control Input. DIN (Pin 4): The Serial Data Input. REFHI C, REFHI D, REFHI A, REFHI B,(Pins 5, 9, 20, 24): The Inputs to the DAC Resistor Ladder for DAC C/D/A/B. GND (Pins 6, 23): Ground. REFLO C, REFLO D, REFLO A, REFLO B, (Pins 7, 8, 21, 22): The Bottom of the DAC Resistor Ladders for the DACs. These can be used to offset zero-scale above ground. REFLO should be connected to ground when no offset is required. DOUT (Pin 10): The Output of the Shift Register which Becomes Valid on the Rising Edge of the Serial Clock. CLK (Pin 11): The Serial Interface Clock Input. VCC (Pins 15, 28): The Positive Supply Input. 4.5V VCC 5.5V (LTC1458), 2.7V VCC 5.5V (LTC1458L). Requires a bypass capacitor to ground. REFOUT (Pin 19): The Output of the Internal Reference. CLR (Pin 25): The Clear Pin. Clears all DACs to zero-scale when pulled low.
UW
95
1458 G06
LTC1458 Offset Voltage vs Temperature
950 940 930 920 910 900 890 880 870 860 -25 5 35 65 TEMPERATURE (C) 95 125
1458 G07
LTC1458 Supply Current vs Temperature
3 2 1 0 -1 -2 -3 -4 125 -5 -55
VCC = 5.5V
VCC = 5V
VCC = 4.5V
850 -55
-25
5 35 65 TEMPERATURE (C)
95
125
1458 G05
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5
LTC1458/LTC1458L
BLOCK DIAGRA
X1/X2 C 1
VOUT C
2
CS/LD
3
DIN
4
REFHI C
5
GND
6
REFLO C
7 48-BIT SHIFT REGISTER
REFLO D
8
REFHI D
9
DOUT 10
CLK 11
NC 12 12-BIT DAC D REGISTER LD X1/X2 D 14 12-BIT DAC A REGISTER LD
VOUT D 13
6
W
28 VCC LD DAC C 12-BIT DAC C REGISTER LD 12-BIT DAC B REGISTER DAC B 27 X1/X2 B 26 VOUT B POWER-ON RESET 25 CLR 24 REFHI B 23 GND 22 REFLO B 21 REFLO A 20 REFHI A LTC1458: 2.048V LTC1458L: 1.22V 19 REFOUT 18 NC 17 VOUT A DAC D DAC A 16 X1/X2 A 15 VCC REFHI
+
VOUT
-
REFLO X1/X2
1458 BD
LTC1458/LTC1458L
TI I G DIAGRA
t9 CLK
DIN
B0 D PREVIOUS WORD
CS/LD
DOUT
B11 A PREVIOUS WORD
DEFI ITIO S
Resolution (n): Resolution is defined as the number of digital input bits, n. It defines the number of DAC output states (2n) that divide the full-scale range. The resolution does not imply linearity. Full-Scale Voltage (VFS): This is the output of the DAC when all bits are set to 1. Voltage Offset Error (VOS): The theoretical voltage at the output when the DAC is loaded with all zeros. The output amplifier can have a true negative offset, but because the part is operated from a single supply, the output cannot go below zero. If the offset is negative, the output will remain near 0V resulting in the transfer curve shown in Figure 1. The offset of the part is measured at the code that corresponds to the maximum offset specification: VOS = VOUT - [(Code)(VFS)/(2n - 1)] Least Significant Bit (LSB): One LSB is the ideal voltage difference between two successive codes. LSB = (VFS - VOS)/(2n - 1) = (VFS - VOS)/4095 Nominal LSBs: LTC1458 LTC1458L LSB = 4.095V/4095 = 1mV LSB = 2.5V/4095 = 0.610mV
OUTPUT VOLTAGE
NEGATIVE OFFSET
0V
DAC CODE
1458 F01
Figure 1. Effect of Negative Offset
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t1 t2 t6 t7 t4 t3 B11 A MSB B0 B LSB B11 C MSB B0 D LSB t8 t5 B10 A PREVIOUS WORD B0 B PREVIOUS WORD B11 C PREVIOUS WORD B0 D PREVIOUS WORD B11 A CURRENT WORD
1458 TD
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Integral Nonlinearity (INL): End-point INL is the maximum deviation from a straight line passing through the end-points of the DAC transfer curve. Because the part operates from a single supply and the output cannot go below zero, the linearity is measured between full scale and the code corresponding to the maximum offset specification. The INL error at a given input code is calculated as follows: INL = [VOUT - VOS - (VFS - VOS)(code/4095)]/LSB VOUT = The output voltage of the DAC measured at the given input code
7
LTC1458/LTC1458L
DEFI ITIO S
Differential Nonlinearity (DNL): DNL is the difference between the measured change and the ideal 1LSB change between any two adjacent codes. The DNL error between any two codes is calculated as follows: DNL = (VOUT - LSB)/LSB VOUT = The measured voltage difference between two adjacent codes Digital Feedthrough: The glitch that appears at the analog output caused by AC coupling from the digital inputs when they change state. The area of the glitch is specified in (nV)(sec).
OPERATIO
Serial Interface
The data on the DIN input is loaded into the shift register on the rising edge of the clock. Data is loaded as one 48-bit word, DAC A first, then DAC B, DAC C and DAC D. The MSB is loaded first for each DAC. The DAC registers load the data from the shift register when CS/LD is pulled high. The CLK is disabled internally when CS/LD is high. Note: CLK must be low before CS/LD is pulled low to avoid an extra internal clock pulse. The buffered output of the 48-bit shift register is available on the DOUT pin which swings from ground to VCC. Multiple LTC1458/LTC1458Ls may be daisy-chained together by connecting the DOUT pin to the DIN pin of the next chip, while the CLK and CS/LD signals remain common to all chips in the daisy-chain. The serial data is clocked to all of the chips, then the CS/LD signal is pulled high to update all of them simultaneously.
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Reference The LTC1458L has an internal reference of 1.22V with a full scale of 2.5V (gain of 2 configuration). The LTC1458 includes an internal 2.048V reference, making 1LSB equal to 1mV (gain of 2 configuration). When the buffer gain is 2, the external reference must be less than VCC /2 and be capable of driving the 15k minimum DAC resistor ladder. The external reference must always be less than VCC - 1.5V. Voltage Output The rail-to-rail buffered output of the LTC1458 family can source or sink 5mA when operating with a 5V supply over the entire operating temperature range while pulling to within 300mV of the positive supply voltage or ground. The output swings to within a few millivolts of either supply rail when unloaded and has an equivalent output resistance of 40 when driving a load to the rails. The output can drive 1000pF without going into oscillation.
LTC1458/LTC1458L
APPLICATIONS INFORMATION
Using Two DACs to Digitally Program the Full Scale and Offset of a Third Figure 2 shows how to use one LTC1458 to make a 12-bit DAC with a digitally programmable full scale and offset. DAC A and DAC B are used to control the offset and full scale of DAC C. DAC A is connected in a x 1 configuration and controls the offset of DAC C by moving REFLO C above ground. The minimum value to which this offset can be programmed is 10mV. DAC B is connected in a x 2 configuration and controls the full scale of DAC C by driving REFHI C. Note that the voltage at REFHI C must be less than or equal to VCC/2, corresponding to DAC B's code 2,500 for VCC = 5V, since DAC C is being operated in x 2 mode for full rail-to-rail output swing. The transfer characteristic is: VOUTC = 2 * [DC * (2 * DB - DA) + DA] * REFOUT where REFOUT = The Reference Output DA = (DAC A Digital Code)/4096 This sets the offset. DB = (DAC B Digital Code)/4096 This sets the full scale. DC = (DAC C Digital Code)/4096
X1/X2 C VOUT VOUT C CS/LD DIN REFHI C GND REFLO C 500 REFLO D REFHI D DOUT CLK NC VOUT D X1/X2 D LTC1458 LTC1458L
U
W
U
U
VCC X1/X2 B VOUT B CLR REFHI B GND REFLO B REFLO A REFHI A REFOUT NC VOUT A X1/X2 A VCC 0.1F
5V
1458 F02
Figure 2
9
LTC1458/LTC1458L
PACKAGE DESCRIPTION
0.205 - 0.212** (5.20 - 5.38)
0.005 - 0.009 (0.13 - 0.22)
0.022 - 0.037 (0.55 - 0.95)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
10
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Dimensions in inches (millimeters) unless otherwise noted.
G Package 28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.397 - 0.407* (10.07 - 10.33) 28 27 26 25 24 23 22 21 20 19 18 17 16 15
0.301 - 0.311 (7.65 - 7.90)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 0.068 - 0.078 (1.73 - 1.99)
0 - 8
0.0256 (0.65) BSC
0.010 - 0.015 (0.25 - 0.38)
0.002 - 0.008 (0.05 - 0.21)
G28 SSOP 0694
LTC1458/LTC1458L
PACKAGE DESCRIPTION
0.291 - 0.299** (7.391 - 7.595) 0.010 - 0.029 x 45 (0.254 - 0.737) 0 - 8 TYP
0.009 - 0.013 (0.229 - 0.330)
NOTE 1 0.016 - 0.050 (0.406 - 1.270)
NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Dimensions in inches (millimeters) unless otherwise noted.
SW Package 28-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
0.697 - 0.712* (17.70 - 18.08) 28 27 26 25 24 23 22 21 20 19 18 17 16 15
NOTE 1
0.394 - 0.419 (10.007 - 10.643)
1 0.093 - 0.104 (2.362 - 2.642)
2
3
4
5
6
7
8
9
10
11
12
13
14 0.037 - 0.045 (0.940 - 1.143)
0.050 (1.270) TYP
0.014 - 0.019 (0.356 - 0.482) TYP
0.004 - 0.012 (0.102 - 0.305)
S28 (WIDE) 0996
11
LTC1458/LTC1458L
TYPICAL APPLICATION
X1/X2 C LTC1458: 0V TO 4.095V LTC1458L: 0V TO 2.5V P VOUT C CS/LD DIN REFHI C GND REFLO C REFLO D REFHI D DOUT CLK NC LTC1458: 0V TO 4.095V LTC1458L: 0V TO 2.5V VOUT D X1/X2 D LTC1458 LTC1458L VCC X1/X2 B VOUT B CLR REFHI B GND REFLO B REFLO A REFHI A REFOUT NC VOUT A X1/X2 A VCC
1458 TA03
RELATED PARTS
PART NUMBER LTC1257 LTC1446/LTC1446L LTC1450/LTC1450L LTC1451 LTC1452 LTC1453 LTC1454/LTC1454L LTC1456 DESCRIPTION Single 12-Bit VOUT DAC, Full Scale: 2.048V, VCC: 4.75V to 15.75V, Reference Can Be Overdriven up to 12V, i.e., FSMAX = 12V Dual 12-Bit Rail-to-Rail Output DACs in SO-8 Package Single 12-Bit Rail-to-Rail Output DACs with Parallel Interface Single Rail-to-Rail 12-Bit DAC, Full Scale: 4.095V, VCC: 4.5V to 5.5V Single Rail-to-Rail 12-Bit VOUT Multiplying DAC, VCC: 2.7V to 5.5V Single Rail-to-Rail 12-Bit VOUT DAC, Full Scale: 2.5V, VCC: 2.7V to 5.5V Dual 12-Bit VOUT DACs in SO-16 Package with Added Functionality Single Rail-to-Rail Output 12-Bit DAC with Clear Pin, Full Scale: 4.095V, VCC: 4.5V to 5.5V COMMENTS 5V to 15V Single Supply, Complete VOUT DAC in SO-8 Package LTC1446: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V LTC1446L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V LTC1450: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V LTC1450L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V Low Power, Complete VOUT DAC in SO-8 Package Low Power, Multiplying V OUT DAC with Rail-to-Rail Buffer Amplifier in SO-8 Package 3V, Low Power, Complete VOUT DAC in SO-8 Package LTC1454: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V LTC1454L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V Low Power, Complete VOUT DAC in SO-8 Package with Clear Pin
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417 q (408) 432-1900 FAX: (408) 434-0507q TELEX: 499-3977 q www.linear-tech.com
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0.1F
LTC1458: 4.5V TO 5.5V LTC1458L: 2.7V TO 5.5V LTC1458: 0V TO 4.095V LTC1458L: 0V TO 2.5V
LTC1458: 2.048V LTC1458L: 1.22V LTC1458: 0V TO 4.095V LTC1458L: 0V TO 2.5V
14588lf LT/TP 0397 7K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1996

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